基本信息
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Bio
More than 25 years of experience in IC design, development, and management.
- Mixed Signal ASIC design at all levels, with a focus on high performance analog blocks for a broad range of applications, including biomems and biomedical ASIC designs, custom ASICs for consumer electronics, medical devices, automotive industry, CMOS image sensors and Vision Chips.
- Designed and silicon proven a large range of analog IP, including high speed ADC, DAC, SDM, PLL, bandgap, temperature sensors, humidity sensors, force and pressure sensors, power regulators and management, ...
- Responsible for ASIC designs at all levels, including feasibility study, architecture definition, system-level modeling, specification, analog and digital design/simulation, analog layout, physical and functional verification, digital and mixed-signal floorplaning, synthesis, place-and-route, timing-closure, test coverage, test vector generation, foundry and test-house interactions
- Mixed Signal ASIC design at all levels, with a focus on high performance analog blocks for a broad range of applications, including biomems and biomedical ASIC designs, custom ASICs for consumer electronics, medical devices, automotive industry, CMOS image sensors and Vision Chips.
- Designed and silicon proven a large range of analog IP, including high speed ADC, DAC, SDM, PLL, bandgap, temperature sensors, humidity sensors, force and pressure sensors, power regulators and management, ...
- Responsible for ASIC designs at all levels, including feasibility study, architecture definition, system-level modeling, specification, analog and digital design/simulation, analog layout, physical and functional verification, digital and mixed-signal floorplaning, synthesis, place-and-route, timing-closure, test coverage, test vector generation, foundry and test-house interactions
Research Interests
Papers共 70 篇Author StatisticsCo-AuthorSimilar Experts
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Davide Braga,Kushal Das,Neil Dick, Ken Dyer,Troy England,Farah Fahim,Scott Holm,Ping Lu,Alireza Moini,Frederic Nolet,Paul Rubinov, Len Sanderson,Barry Thompson,Xiaoran Wang
Design of a 12-bit 10-GSPS Cryogenic ADC for Quantum Readout (2024)
Davide Braga,Kushal Das,Neil Dick, Ken Dyer,Troy England,Farah Fahim,Scott Holm,Ping Lu,Alireza Moini,Frederic Nolet,Paul Rubinov, Len Sanderson,Barry Thompson,Xiaoran Wang
Design of a Low-Jitter 10 GHz PLL for a 12-bit 10-GSPS Cryogenic ADC for Quantum Readout in 22FDX (2024)
KYBERNETESno. 10 (2024): 3621-3658
Transforming Government People, Process and Policyno. 4 (2023): 603-631
JOURNAL OF QUALITY IN MAINTENANCE ENGINEERINGno. 2 (2023): 509-529
Chip Development Toward 12 bit 10 GSPS Cryogenic ADC for Multiplexed Quantum Readout (2023)
Journal of Central South Universityno. 8 (2020): 2291-2310
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Author Statistics
#Papers: 69
#Citation: 1302
H-Index: 18
G-Index: 35
Sociability: 4
Diversity: 2
Activity: 0
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