Challenges and Solutions for Ultra-Thin (50 Μm) Silicon Using Innovative ZoneBOND™ Process
2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)（2012）
Key words
adhesive bonding,elemental semiconductors,silicon,three-dimensional integrated circuits,wafer bonding,Si,TEOS type deposits,TSV CMP,TTV,adhesive cleaning chemistries,backside processes,coating-bonding process,deformation,dielectric deposition process,dielectric process window,fully-functional interposers,innovative temporary ZoneBONDTM process,integration process,interposer backside topology,oxide deposits,process flow,separation tape identification,silicon interposers,tape selection study,temperature 200 degC,temporary bonding interface,thinning process,ultrathin silicon wafers
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