Novel Hybrid Low-Resource Field-Programmable-Gate-Array Time-to-digital-converter Architecture
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT（2025）
关键词
Delays,Clocks,Field programmable gate arrays,Hardware,Computer architecture,Linearity,Time-domain analysis,Interpolation,Delay lines,Resource management,Low resources,multiphase shift-clock,tapped delay line (TDL),time-to-digital converters (TDCs)
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